A250CF CoolFET Charge Sensitive Preamplifier

Features

Thermoelectrically Cooled FET
Noise: 670 eV FWHM (Si), ~76 electrons RMS
3 FETs to match detector
Noise Slope: 13 eV/pF with low Ciss FET
11.5 eV/pF with high Ciss FET
Fast Rise Time: 2.5 ns
AC or DC coupling to the detector
Easy to use
Both Energy and Timing outputs
Optional input protection

A250CF CoolFET Noise as a Function of Detector Input Capacitance (2 µs shaping time constant).

Specifications

Performance

Noise at 0 pF 2 µs shaping	keV FWHM	e– RMS	Coulombs RMS
Low Ciss FET	0.670 (DC coupled); 1.00 (AC coupled 400 MΩ bias resistor)	76 (DC); 113 (AC)	1.2×10-17 (DC); 1.81×10-17 (AC)
High Ciss FET	0.850 (DC coupled); 1.20 (AC coupled 400 MΩ bias resistor)	96 (DC); 136 (AC)	1.5×10-17 (DC); 2.2×10-17 (AC)
Noise Slope	Low Ciss: 13 (eV/pF) High Ciss: 11.5 (eV/pF)

Typical noise data for A250CF CoolFET. The noise depends on (1) the detector capacitance, (2) input configuration (AC vs DC coupling, use of input protection), and (3) which CoolFET is used.

FET Capacitance

Low Ciss (FET 1 and 2)	8 pF
High Ciss (FET 3)	60 pF

General Characteristics

Rise Time	2.5 ns (0 pF and no output buffer)
Decay Time Constant (T=Rf*Cf)	2 GOhms x 0.5 pF = 1ms
Sensitivity Cf = 0.5 pF Gain of 2 in the output buffer	176 mV/MeV (Si) 220 mV/MeV (Ge) 144 mV/MeV (CdTe) 152 mV/MeV (HgI2) 4 V/pC 0. 64 µV/electron
Integral Nonlinearity	< 0.03%
Detector Input	Positive or negative
Detector Bias Voltage	Maximum 1 kV, positive or negative, from a power supply
Test Input	Voltage pulses for system test and calibration
Energy (E) Output	Provides an output voltage step proportional to the input charge. Polarity adjustable. DC offset adjustable.
Timing (T) Output	Provides a tail pulse (1 µs decay) for system timing measurements. Polarity adjustable. Amplitude equal to E output.
Output Impedance (Both E and T)	50 Ohms
Dynamic Range	±4 V, offset adjustable to ±6 V

Power and Connections

Input, Test, Energy (E), Timing (T)	BNC
Bias	SHV
Power	5 V DC at 1.6 A (AC power adapter included)

Description

The A250CF CoolFET is a charge sensitive preamplifier. The input to the preamplifier is the signal from a radiation detector, a current pulse of short duration (ms or less). The total energy deposited is proportional to the total charge generated.

The primary output of A250CF (the energy output) is a voltage step proportional to the input charge, the time integral of the current pulse, with a gain of 176 mV/MeV (Si). This step has a fast rise (the rise time of the A250CF is 2.5 ns for 0 capacitance) and a slow decay to baseline (1 ms). This energy output is generally sent to a shaping amplifier and is used for spectroscopic measurements. The timing output has a much faster decay, 1 µs, and is used as the input to a timing circuit.

The A250CF consists of several main function blocks. The core of the preamplifier is the charge amplifier itself, which consists of the CoolFET hybrid, the A250 amplifier, and the feedback components. This circuit produces the voltage output for a current input, and determines the output noise and rise time.

The series noise of a preamplifier is at its minimum when the input capacitance is comparable to the FET capacitance. The A250CF includes a jumper that permit the user to select 1 of 3 FETs, to match capacitance. Jumpers are used to connect the gates to the input, to connect the commensurate drains, and to select the proper drain resistor, to set the drain current.

There are additional circuit elements in the A250CF, including (1) connections to detector bias, (2) optional input protection circuitry (enabled when shipped from the factory), (3) a test input, (4) an amplifier which buffers the energy output and provides for polarity and offset adjustments, (5) an amplifier which buffers the timing output and provides for polarity adjustment, and (6) power supply circuitry.

CoolFET is a registered trademark of Amptek Inc.

A250CF CoolFET preamplifier block diagram

Figure 2. A250CF CoolFET Block Diagram.

CoolFET Hybrid

The CoolFET hybrid contains three (3) FETs that are placed on top of a thermoelectric cooler and enclosed in a TO-8 package. There are two main advantages to cooling the FET: it reduces the leakage current and increases the transconductance, both of which reduce the electronic noise of the system. The increased transconductance provides a much improved noise slope (eV/pF) over un-cooled systems, which is especially important for large capacitance detectors.